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Easier, Faster, Simpler Bench Top Design Verification
Available on demand.
Available in English, Japanese, and Chinese language versions.

This seminar discusses the challenges faced by both analog and digital circuit design engineers during the verification of a circuit design. Example of tests and techniques used in circuit verification are used to explain the value of highly integrated source measure instruments.

By participating in this seminar you will learn and understand:
  • How to quickly and easily measure IDDQ(Integrated Circuit Quiescent Current)
  • How to characterize load regulation (programmable load)
  • How to characterize a diode (including breakdown and leakage)
  • How to measure a very low resistance
  • How to charge / discharge a battery or super capacitor
This seminar is recommended for circuit design engineers who are interested in accelerating bench top design verification and reducing cost and complexity of the verification setup.

Paul Meyer, a Product Marketer in the Small Systems Group at Keithley Instruments, presents the seminar. This seminar discusses the challenges faced by both analog and digital circuit design engineers during the verification of a circuit design. Example of tests and techniques used in circuit verification are used to explain the value of highly integrated source measure instruments.

Event Length: Approximately 40 minutes
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